16M x 4-Bit Dynamic RAM (4k & 8k Refresh, EDO-Version) This HYB3164(5)405A is a 64 MBit dynamic RAM organized 16 777 216 by 4 bits. The device is fabricated on an advanced second generation 64Mbit 0,35µm-CMOS silicon gate process technology. The circuit and process design allow this device to achieve high performance and low power dissipation. The HYB3164(5)405A operates with a single 3.3 +/-0.3V power supply and interfaces with either LVTTL or LVCMOS levels. Multiplexed address inputs permit the HYB 3164(5)405A to be packaged in a 400mil wide SOJ-32 or TSOP-32 plastic package. These packages provide high system bit densities and are compatible with commonly used automatic testing and insertion equipment.The HYB3164(5)405ATL parts have a very low power „sleep mode“ supported by Self Refresh. Advanced Information • 16 777 216 words by 4-bit organization • 0 to 70 °C operating temperature • Hyper Page Mode - EDO - operation • Performance: • Single + 3.3 V (± 0.3V) power supply • Low power dissipation: max. 450 active mW ( HYB 3164405AJ/AT(L)-40) max. 360 active mW ( HYB 3164405AJ/AT(L)-50) max. 324 active mW ( HYB 3164405AJ/AT(L)-60) max. 612 active mW ( HYB 3165405AJ/AT(L)-40) max. 405 active mW ( HYB 3165405AJ/AT(L)-50) max. 432 active mW ( HYB 3165405AJ/AT(L)-60) 7.2 mW standby (LVTTL) 3.24 mW standby (LVMOS) 720 µA standby for L-version • Read, write, read-modify-write, CAS-before-RAS refresh (CBR), RAS-only refresh, hidden refresh • Self refresh (L-version only) • 8192 refresh cycles/128 ms , 13 R/ 11C addresses (HYB 3164405AJ/AT) 4096 refresh cycles/ 64 ms , 12 R/ 12C addresses (HYB 3165405AJ/AT) • 256 msec refresh period for L-versions • Plastic Package: P-SOJ-32-1 400 mil HYB 3164(5)400AJ P-TSOPII-32-1 400 mil HYB 3164(5)400AT(L)
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